1. Field of the Invention
The present invention pertains to data encoding schemes, and in particular, to a data encoding scheme and associated decoding method and device that does not employ a digital clock or system clock signal. The present invention also pertains to a counter-less shift register that may be employed in connection with the data encoding scheme of the present invention.
2. Description of the Related Art
In a wireless serial data transmission system, a data stream in the form of a series of binary symbols (e.g., 1s and 0s) is typically transmitted from a transmitter device to a receiver device by: (i) encoding the data stream and thereby generating an encoded data signal (by converting the series of binary symbols to an analog form according to an encoding scheme), (ii) transmitting the encoded data signal from the transmitter device to the receiver using an appropriate modulation technique, (iii) receiving and demodulating the transmitted signal at the receiver device in order to obtain the original encoded data signal, and (iv) decoding the encoded data signal in the receiver device to extract/obtain the original data stream (the series of binary symbols) from the encoded signal. In current data transmission methods, the receiving device extracts/obtains the original data stream from the encoded signal using an explicit clock signal that is common to the transmitter device and the receiver device. The explicit clock signal is either separately generated using additional dock circuitry provided as part of the receiver device or extracted from the transmitted data.
For example, one type of prior art encoding technique is known as pulse width coding (PWC) or pulse interval encoding (PIE). In PWC and PIE, each bit of data/binary symbol (e.g., each 1 and 0) is represented by an energy pulse having a certain duration. For instance, a 1 may be represented by a pulse having a width equal to 5 clock pulses and a 0 may be represented by a pulse having a width equal to 3 clock pulses. Thus, determining the number of clock pulses within each received energy pulse enables that energy pulse to be decoded as either a binary 1 or a binary 0. FIG. 1 is a schematic diagram representing such a PWC or PIE scheme. As will be appreciated, such a scheme requires a local, high frequency clock signal at the receiver device, which in turn leads to a high power requirement at the receiver device.
As another example, in Manchester encoding, the clock signal is provided within the code itself, allowing the clock to be extracted at the receiving end by sampling the received signal and counting the number of samples within each symbol received. This means that there must be a clock present at the receiver device that provides a sampling signal at a higher bit rate than the incoming data stream, which in turn leads to a high power requirement at the receiver device.
Power consumption is a major concern in many electronic systems. For example, power consumption is a major concern in UHF passive RFID tag systems, wherein the operating range of such systems mainly depends on the power consumption of the RFID tags. Many current UHF passive RFD tag systems employ PIE, wherein the tag includes a PIE decoder module. The PIE decoder module in known to consume a significant amount of power due to the fact, as described above, it uses a high frequency oscillator to determine the width of each portion of the encoded signal in order to distinguish a 1 bit from a 0 bit.
There is thus a need for an encoding scheme and associated decoder module that eliminates the use of a high power consuming clock (e.g., a high frequency clock), thereby lower power consumption at the receiving end.